SK Chair Sees Memory Shortage Through 2030, Eyes Capacity Doubling and Stronger TSMC, Taiwan Ties
  As next-gen HBM solutions has become a key focus at COMPUTEX amid surging AI demand, SK Group Chairman Chey Tae-won made a brief visit to the SK hynix booth on June 2 and spoke with the media. According to TechNews, Chey expects supply-demand tightness in the memory market to persist through 2030.  Notably, he also said SK will make full efforts to expand production under tight supply conditions, targeting a doubling of total wafer capacity over the next five years, the report adds.  Marking his first appearance at COMPUTEX, Chey noted that Taiwan has a highly complete AI supply chain and a strong partner ecosystem. As SK Group continues to expand its AI business, he stressed the need to deepen collaboration with more Taiwanese companies. Beyond TSMC, he said meetings with firms such as Foxconn and Asus are also part of this visit to better understand ongoing cooperation and explore ways to further strengthen partnerships, according to the report.  SK hynix and TSMC have a long-standing partnership, particularly in logic die integration as custom HBM solutions become an emerging industry trend. As previously reported by The Chosun Daily, SK hynix is expected to adopt a 10nm-class 6th-generation (1c) DRAM process for the core die in its HBM4E, paired with a logic die built on TSMC’s 3nm node. For HBM4 supplied to NVIDIA this year, the company is said to be using a 10nm-class 5th-generation (1b) DRAM core die alongside a logic die based on TSMC’s 12nm process.  Jensen Huang’s SK hynix Booth Visit Marks Another COMPUTEX Highlight  It is also wort noting that NVIDIA CEO Jensen Huang also visited the SK hynix booth at COMPUTEX 2026 on June 2, meeting SK Group Chairman Chey Tae-won for the second consecutive day, following a dinner meeting the previous evening. According to Chosun Biz, after his keynote the day before—where he directly identified SK hynix as a supplier of next-generation HBM4—Huang toured the exhibition floor and reviewed the company’s latest memory products.  During the visit, Huang joined Chey at the SK hynix booth to examine the showcased portfolio, including HBM4E wafers and chipset samples, which entered sampling at the end of last month, the report says. It also marked the first public unveiling of an HBM4E physical mock-up, according to Chosun Biz.
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Release time:2026-06-03 10:57 reading:151 Continue reading>>
NVIDIA Enters PC Market with RTX Spark Featuring MediaTek-Co-Designed N1X CPU on TSMC 3nm
  As traditional CPU leaders such as Intel push further into the AI accelerator market, NVIDIA is moving in the opposite direction—leveraging its dominance in AI computing to expand into the PC processor arena. At GTC Taipei on June 1, CEO Jensen Huang unveiled the NVIDIA RTX Spark, developed in partnership with Microsoft and powered by the new Arm-based N1X processor co-designed with MediaTek, according to NVIDIA and CNBC.  According to CNBC, the initial rollout will include more than 30 notebook models and 10 desktop systems. RTX Spark-powered devices from Microsoft, Dell, HP, ASUS, Lenovo, and MSI are expected to debut this fall, marking NVIDIA’s first large-scale push into the Windows PC CPU market.  CNBC adds that the platform combines NVIDIA’s Blackwell GPU architecture with the N1X CPU and 128GB of unified memory, bringing data center-class AI capabilities to personal computers. Notably, the new PC processor will be manufactured using TSMC’s 3nm process, which is currently produced exclusively in Taiwan, according to CNBC.  More Spec Details  Interestingly, as noted by The Verge, the flagship RTX Spark mirrors the DGX Spark almost exactly — 20 CPU cores, 6,144 GPU cores, 128GB of LPDDR5X memory — though NVIDIA plans to release leaner, more affordable variants, with some configurations dropping to just 16GB of RAM.  Meanwhile, NVIDIA has provided additional details on the platform’s performance. According to The Verge, with up to 128GB of unified memory—on par with AMD’s previous-generation Strix Halo—RTX Spark laptops and desktops are also capable of hosting AI agents with up to 120 billion parameters, a capability Microsoft appears eager to integrate into Windows.  Powered by RTX Spark, NVIDIA claims the system can render a 90GB 3D scene, edit 12K video, or run graphically intensive titles like Indiana Jones and the Great Circle at a smooth 100fps in 1440p—all within a 14mm-thin laptop operating without being plugged into power, the report adds.  CNBC, citing an NVIDIA spokesperson, reports that RTX Spark is described as being “roughly equivalent” to the company’s flagship RTX 5070 laptop GPU.  NVIDIA is certainly not the only player eyeing to expand its CPU footprint. As noted by CNBC, Apple now designs its own Arm-based processors for Mac computers, having rolled out a higher-end MacBook lineup powered by its latest M5 chips in March. In the same month, Arm unveiled its first in-house CPU, with Meta reportedly serving as the launch customer for the Arm AGI CPU, according to TechCrunch.
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Release time:2026-06-02 10:29 reading:206 Continue reading>>
SK hynix Introduces iHBM Solution, Targets HBM5 Adoption with 30% Thermal Resistance Reduction
  As thermal management emerges as a key challenge for HBM, SK hynix has unveiled its iHBM solution, which integrates cooling elements (ICEs) directly into the HBM package. The company plans to adopt the technology in next-generation products, including HBM5, according to its press release.  According to SK hynix, unlike conventional HBM designs that dissipate heat through the core die, iHBM integrates cooling elements (ICEs), made of thermally conductive, electrically non-conductive silicon-based materials, directly into the D2D PHY between HBM and GPUs, where heat is most concentrated. The company said the technology reduces thermal resistance by 30% and improves operating stability.  As highlighted by SK hynix, the iHBM solution adopts a structural approach to thermal management by creating an additional heat dissipation path within the package. It also leverages the company’s wafer-level packaging (WLP) process and proven MR-MUF technology to enable stable high-volume manufacturing.  In addition, its compatibility with existing System-in-Package (SiP) architectures allows customers to adopt the thermal solution with minimal design modifications, SK hynix adds.  In terms of future roadmap, SK hynix plans to incorporate the iHBM solution into next-generation HBM products, including HBM5, with the goal of improving the stability and efficiency of HPC systems and AI data centers.  Another Key Technology beyond Hybrid Bonding  Alongside SK hynix’s latest iHBM solution, hybrid bonding is widely seen as a key approach to addressing heat dissipation challenges in 20-stack HBM, which, as previously reported by The Elec, are expected to become increasingly difficult.  As explained in the report, hybrid bonding differs from conventional thermo-compression (TC) bonding, which connects chips through soldered micro-bumps. Instead, it bonds dielectric materials such as silicon dioxide (SiO₂) and copper through an annealing process at temperatures of roughly 200°C to 400°C.  By heating and gradually cooling copper sealed within dielectric layers, thermal expansion and vertical pressure enable direct copper-to-copper diffusion bonding without reaching copper’s melting point, the report notes, adding this approach helps reduce thermal damage to semiconductor circuits while delivering improved thermal and electrical performance.
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Release time:2026-05-27 10:42 reading:379 Continue reading>>
Micron More Upbeat on Outlook, Reportedly Sets 2027 HBM4E Ramp with TSMC for Standard, Custom Logic Dies
  Two months after its March earnings call, Micron is turning more upbeat on its outlook, while providing additional details on its custom HBM development progress. At the J.P. Morgan 54th Annual Global Technology, Media and Communications Conference, Micron’s Global Operations EVP Manish Bhatia, via STOCK Analysis transcript, said the company’s first HBM4E will be a JEDEC-standard product, with ramp-up scheduled for 2027.  While Micron is still using 1-beta DRAM for HBM4, Bhatia said the company is expected to transition to 1-gamma DRAM in the HBM4E era. He also confirmed that the logic dies for both standard and custom HBM4E are expected to be manufactured by TSMC.  When asked about the margin profile of customized products, Bhatia, according to STOCK Analysis, highlighted that value creation stems from multiple proprietary layers: design innovation, robust core DRAM development, and advanced packaging.  He emphasized that customization represents the next evolution of this value expansion, and as the value increases, customers are expected to be willing to pay for the added customization.  Improving Outlook vs. Previous Earnings Call  According to Bhatia, Micron now expects tight conditions across HBM, DRAM, and NAND to persist well beyond 2026. Thus, he noted that the financial outlook has strengthened since the company’s last earnings call, and it is on track for another substantial record free cash flow in fiscal Q3.  Notably, Bhatia pointed out that while pricing has largely played out as expected, demand remains very strong. He added that the AI ecosystem is shifting from human interactions to agentic and even machine-to-machine workflows, with these agentic workloads increasingly driving inference demand. As inference takes up a larger share of workloads, memory is increasingly seen as a strategic asset for customers, he said.  Against this backdrop, Micron said in March that it had secured its first strategic customer agreement—a five-year deal with a large customer. Since then, the company has made meaningful progress on additional SCAs, with other customers also showing strong interest in establishing similar strategic relationships with Micron, including in NAND, Bhatia said.  India Capacity Reported Booked up  Amid tight demand, Bhatia also said Micron’s global expansion is accelerating. He noted that its Idaho 1 site is progressing well, with the company pulling forward its wafer output timeline from the second half of 2027 to mid-2027.  Surging memory demand is also driving ramp-up at Micron’s new semiconductor assembly and test facility in Sanand, Gujarat, which began operations in late February. In a separate report by Business Standard, Micron’s entire memory production capacity in India has been fully booked amid strong demand.  According to a previous Business Standard report, at full capacity, the facility could account for up to 10% of Micron’s global output, supplying both domestic and international markets.  Sumit Sadana, executive vice-president and chief business officer at Micron, reportedly told Indian media outlet The Economic Times that the global semiconductor memory shortage triggered by the AI boom is proving far more severe than many companies currently anticipate, with the crunch potentially extending well beyond 2028 despite aggressive capacity expansion across the industry.
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Release time:2026-05-25 10:44 reading:421 Continue reading>>
Samsung Reportedly Develops Mobile HBM Packaging With Copper Pillars, Bandwidth Up 15%–30%
  Samsung Electronics is reportedly developing a next-generation HBM packaging technology aimed at bringing high-performance on-device AI to mobile devices. According to ETNews, sources say the company is working on a “Multi Stacked FOWLP” technology that combines ultra-high-aspect-ratio copper pillars with FOWLP (Fan-Out Wafer Level Packaging) by advancing its existing VCS (Vertical Cu-post Stack) technology.  The report notes that traditional mobile memory (LPDDR) packaging still relies on copper wire bonding. However, the technology is limited to roughly 128 to 256 I/O terminals, while also suffering from higher signal loss and lower thermal and power efficiency. To address these constraints, Samsung previously introduced its VCS (Vertical Cu-post Stack) technology, which arranges DRAM dies in a staircase-style stacked structure connected by copper pillars. The newly reported technology is viewed as a further evolution of this approach through the adoption of ultra-high-aspect-ratio copper pillars.  More specifically, Samsung has increased the aspect ratio of copper pillars used in VCS packaging from 3–5:1 to 15–20:1, significantly boosting bandwidth, the report notes. However, copper pillars thinner than 10 micrometers become more vulnerable to bending and breakage. To address this issue, Samsung reportedly combined the design with an FOWLP process, which molds the chip and extends wiring outward to help support the copper pillars.  The approach could enable more I/O terminals within the same area, potentially boosting bandwidth by 15% to 30% while increasing memory stack capacity by more than 1.5 times, the report adds.  Commercialization Timeline Remains Unclear  Meanwhile, the technology is still under development, making the timeline for mass production and commercialization unclear. However, the report says industry observers believe it could be adopted as early as a later version of the Exynos 2800 or the Exynos 2900.  Notably, some industry observers said mobile HBM development and commercialization could progress more slowly than initially expected, as demand for HBM in servers, data centers, and AI accelerators is expected to remain strong for the foreseeable future. The report adds that booming demand for server and data center HBM may make it difficult for Samsung to fully concentrate its resources on mobile HBM development.  SK hynix Advances Mobile AI Packaging  SK hynix is also accelerating development of semiconductor packaging technologies for smartphones and Extended Reality (XR) devices. According to a Hankyung report published earlier this year, sources say the company is developing “High Bandwidth Storage (HBS),” a packaging solution that vertically stacks low-power (LPDDR) DRAM and NAND flash memory beside the Application Processor (AP), which handles core computing tasks in IT devices.  Hankyung notes that HBS adopts a packaging technology called “Vertical Fan-Out” (VFO). Unlike conventional wire bonding, which connects stacked memory and substrates with thin copper wires, VFO uses pillar-shaped interconnects to enable denser wiring and faster data transfer speeds, helping APs process rapidly growing AI-driven workloads.
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Release time:2026-05-15 10:49 reading:695 Continue reading>>
Visit NOVOSENSE at PCIM Europe 2026!
  We warmly invite you to visit NOVOSENSE at PCIM Europe 2026. Discover how NOVOSENSE empowers innovation across automotive electronics, renewable energy & power supply, and industrial control with a comprehensive portfolio of isolators, interfaces, drivers, sensors, signal chain, and power management ICs.  Date: June 9–11, 2026  Venue: Nuremberg Exhibition Centre, Germany  Booth: Hall 4A, Booth 119  ✦ What to Expect ✦  Functional safety ICs for safety-critical automotive systems  One-stop body control & automotive lighting solutions  SerDes and ultrasonic radar IC solutions for smarter mobility  Technical presentations on high-voltage electric mobility and AI data center power systems  ✦ Highlights Preview ✦  Functional Safety ICs for Safety-Critical Automotive Systems  Isolated gate driver NSI6911F — certified by TÜV Rheinland to meet ISO 26262 ASIL D requirements, featuring up to 19A peak drive capability, ±150kV/μs CMTI, an integrated 12-bit isolated ADC, and advanced diagnostic functions for high-voltage applications such as traction inverters, OBCs, and DC-DC converters.  ASIL B ultrasonic radar ASSP NSUC1800 and LED driver NSL21924FS , reflecting NOVOSENSE's expanding functional safety portfolio across sensors, signal chain, power management, and driver ICs.  One-Stop Automotive Body Control & Lighting Solutions  For BCM and ZCU applications, NOVOSENSE offers motor driver products for brushed DC motors, stepper motors, BLDC motors, relays, valves, and solenoids, supporting efficient, precise, and safe motor control.  For automotive lighting, NOVOSENSE will showcase full-scenario LED driver solutions for ambient lighting, reading lights, headlighting, rear lighting, ISD/ISC lighting, grille lighting, and more, helping create safer, smarter, and more distinctive vehicle lighting experiences.  Enabling Smarter Mobility with SerDes and Ultrasonic Radar IC Solutions  SerDes chipset — NLS9116 single-channel serializer and NLS9246 four-channel deserializer, designed for cameras, displays, and domain controllers in ADAS and intelligent cockpit systems.  AK2 ultrasonic radar ASSP — comprising the NSUC1800 sensor-side chip and NSUC1802 host-side interface conversion chip, providing a turnkey solution for applications such as UPA and APA.  ✦ Keynote Speeches ✦  Join NOVOSENSE experts at PCIM Europe 2026 for in-depth technical presentations on how advanced semiconductor technologies are addressing the evolving demands of high-voltage electric mobility and AI data center power systems.  E-Mobility & Energy Storage Stage  Hall 6, Booth 220  Topic: Evolution and Challenges of Gate Driver Technology for New Generation of xEV Powertrain System  Time: June 9, 2026 | 15:25–15:45 (GMT+1)  Speaker: Timmy Wu  Topic: Enabling EV High-Voltage Safety with Advanced Isolated Sensing  Time: June 11, 2026 | 12:05–12:25 (GMT+1)  Speaker: Lillian Liu  AI & Data Centers Stage  Hall 5, Booth 320  Topic: Power Density Scaling in AI Data Centers: From System Constraints to Semiconductor Device Challenges  Time: June 9, 2026 | 14:35–14:55 (GMT+1)  Speaker: Wenzhe Xu
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Release time:2026-05-14 11:40 reading:688 Continue reading>>
Apple Reportedly Keeps 2nm 5G Modem Orders with TSMC Amid Intel Cooperation Signals
  While recent market chatter has focused on a potential shift by Apple between longtime foundry partner TSMC and Intel, the Economic Daily News, citing industry sources, reports that the Cupertino-based company remains heavily dependent on the Taiwanese foundry giant, as it plans to place its entire in-house 5G modem orders with TSMC, leveraging its 2nm process technology.  The report suggests that Apple’s self-developed 5G modem chips are expected to power future iPhone, iPad, and Apple Watch devices, replacing modems from Qualcomm. The volume used across its product lineup is projected to reach hundreds of millions of units, the report adds.  Notably, Apple’s iPhone 17 lineup is expected to be the last to ship with Qualcomm Incorporated’s 5G modems, as the company moves toward a full transition to its in-house C2 baseband chip across all iPhone 18 models, according to Wccftech.  The C2 development builds on Apple’s earlier in-house modem effort. Apple’s C1, first introduced in early 2025 with the iPhone 16e, marked its most complex chip system to date, integrating a 4nm baseband modem and a 7nm transceiver, according to earlier reporting from Reuters. The Economic Daily News further reports that Apple Inc.’s in-house C2 5G modem is expected to add full mmWave support—addressing the Sub-6 GHz limitation of its predecessor—while also incorporating satellite connectivity.  Supply chain sources cited in the Economic Daily News report say TSMC has already secured foundry orders for Apple’s modem chips. Its back-end testing partner is also reportedly preparing for higher demand, with around 600 test systems being procured, as capacity is set to ramp from 2027.  Apple’s Chip Tug-of-War: TSMC vs Intel  Though claims of an Apple order shift to Intel remain unconfirmed, and any such move would not signal a departure from TSMC, cooperation between Apple and Intel appears to be warming. According to The Wall Street Journal, the two companies have reportedly reached a preliminary agreement for Intel to manufacture some of the chips powering Apple devices.  The two sides have been engaged in intensive talks for more than a year, with a formal deal said to have been hammered out in recent months, the report adds.  In parallel, Commercial Times reported earlier that Apple is evaluating Intel’s 18A-P process for its M-series chips. Looking further ahead, The New 7 reports that the first Intel-manufactured low-end M-series chips could emerge as early as mid-2027 under contract production, likely targeting entry-level Macs or iPads.  As highlighted by The Wall Street Journal, Apple’s reported outreach to Intel may reflect growing supply chain pressures, as the Cupertino firm—long TSMC’s top customer—faces tightening access to advanced manufacturing capacity amid surging demand from NVIDIA and other AI chip designers.  Intel previously played a central role in powering Apple’s Mac lineup, before Apple transitioned in 2020 to its own Arm-based custom chips, the report points out.
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Release time:2026-05-11 11:12 reading:578 Continue reading>>
Murata begins mass production of seven automotive MLCCs with world-leading capacitance for their rated voltage and size
  Murata Manufacturing Co., Ltd has begun mass production of seven AEC-Q200-qualified multilayer ceramic capacitors (MLCCs) that achieve the world’s largest capacitance for a given rated voltage and size*, supporting stable operation of in-vehicle systems and greater design flexibility. Five parts in the GCM series are rated at 2.5-4 Vdc, targeting IC peripheral circuits in advanced driver assistance systems (ADAS) and autonomous driving (AD) applications. The remaining two MLCCs are rated at 25 Vdc for in-vehicle power line applications.  In recent years, as ADAS and AD technologies advance, the number and performance level of systems installed in vehicles have continued to increase. As a result, demand for higher capacitance low-voltage MLCCs used around ICs has grown to ensure stable operation. In addition, as the number of MLCCs mounted on PCBs increases, space constraints become the critical, limiting factor in design. At the same time, for medium-rated voltage MLCCs used in automotive power lines, there is a rising demand for both miniaturization and higher capacitance to improve power and mounting density. These needs are particularly pronounced in ADAS and AD systems, where IC peripheral circuits and power lines are both subject to significant voltage fluctuations, requiring further increases in capacitance and reductions in component size.  Leveraging its proprietary ceramic materials along with particle refinement and uniformity technologies, Murata introduces seven automotive MLCCs that achieve the world’s largest capacitance by rated voltage and size.  For low-rated voltage MLCCs, Murata has expanded its lineup of products with a capacitance of 100 µF or higher, achieving 100 µF in the 1206-inch (3.2 mm × 1.6 mm) size, which was previously available only in the larger 1210-inch (3.2 mm × 2.5 mm) size. This reduces PCB mounting area by approximately 36%. In addition, in the smallest automotive MLCC size of 0201-inch (0.6 mm × 0.3 mm), capacitance has been increased from the typical 1-2.2 µF. For medium-rated voltage MLCCs, Murata has achieved a capacitance of 1 µF in the 0402-inch (1.0 mm × 0.5 mm) size, which was previously realized in the larger 0603-inch (1.6 mm × 0.8 mm), reducing PCB mounting area by approximately 61%.  By combining this product lineup, Murata addresses a wide range of challenges in the automotive market, including higher capacitance requirements around ICs, severe PCB space constraints, and stabilization of power lines, thereby contributing to stable operation of entire systems and greater design flexibility. Furthermore, reducing the number of MLCCs required enables lower PCB material usage and reduced power consumption during manufacturing, helping to lessen the environmental impact.  In the low-voltage lineup, the 2.5 Vdc rated GCM035D70E225ME02 is available in the 0201-inch size (0.6 mm × 0.3 mm), and offers a capacitance of 2.2 µF, achieving the world’s largest capacitance for its rated voltage and size class. The 1206-inch size (3.2 mm × 1.6 mm) GCM31CD70E107ME36 is rated at 2.5 Vdc and provides 100 µF, the world’s highest capacitance in its class. The GCM035D70G225MEC2 is rated at 4 Vdc, available in the 0201-inch size (0.6 mm × 0.3 mm), and delivers 2.2 µF, also the world’s highest capacitance for this category. The GCM31CD70G107ME36 is rated at 4 Vdc, available in the 1206-inch size (3.2 mm × 1.6 mm), and offers 100 µF, achieving the world’s highest capacitance for this rated voltage and size. The GCM32ED70G227MEC4 is rated at 4 Vdc, available in the 1210-inch size (3.2 mm × 2.5 mm), and provides 220 µF, the world’s largest capacitance in this class.  The medium-rated voltage lineup has two part numbers designed for power line applications. The GCM155D71E105KE36 is rated at 25 Vdc, available in the 0402-inch size (1.0 mm × 0.5 mm), and offers 1 µF, achieving the world’s highest capacitance for this rated voltage and size. Also rated at 25 Vdc, the GCM31CC71E226ME36 is available in the 1206-inch size (3.2 mm × 1.6 mm), and provides 22 µF, also the world’s highest capacitance in its class.  Murata has long focused on the development of automotive MLCCs and has delivered a wide range of products that demonstrate excellent performance across applications from IC peripheral circuits to powertrain and safety systems. Going forward, Murata will continue to contribute to higher performance and increased functionality of cars through ongoing product development that responds to evolving market needs.
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Release time:2026-04-24 10:39 reading:474 Continue reading>>
ROHM Develops 5th Generation SiC MOSFETs with Approx. 30% Lower On-Resistance at High Temperatures
  ROHM has developed the latest device of its EcoSiC™ series: the 5th Generation SiC MOSFETs optimized for high efficiency power applications. This technology is ideally suitable for automotive electric powertrain systems – such as traction inverters for electric vehicles (xEVs) – as well as power supplies for AI servers and industrial equipment such as data centers.  In recent years, the rapid proliferation of generative AI and big data processing has accelerated the deployment of high-performance servers in the industrial equipment sector. The resulting surge in power density is placing a greater strain on power infrastructure, raising concerns about localized supply shortages. While smart grids that combine renewable energy sources (i.e., solar power) with existing power supply networks are emerging as a possible solution, minimizing losses during energy conversion and storage remains a key challenge.  In the automotive sector, next-generation electric vehicles require extended cruising range and faster charging, creating demand for lower-loss inverters and higher performance onboard chargers (OBCs). Against this backdrop, the adoption of SiC devices capable of both low loss and high efficiency is increasing in high-power applications ranging from a few kilowatts to hundreds of kilowatts.  As the first semiconductor company globally, ROHM was the first in the world to begin mass production of SiC MOSFETs in 2010, contributing to reducing energy losses by implementing SiC devices over a wide range of high-power applications, including offering an early lineup of products compliant with automotive reliability standards such as AEC-Q101. Furthermore, the 4th generation SiC MOSFETs, for which sample provision began in June 2020, have been adopted globally in automotive and industrial applications. They are available across a broad product portfolio, including both discrete devices and modules, supporting the rapid market adoption of SiC technology.  The newly developed 5th Generation SiC MOSFETs achieve industry-leading low loss, driving the broader adoption of SiC technology. Through structural enhancements and manufacturing process optimization, ON resistance is reduced by approximately 30% during high temperature operation (Tj=175°C) compared to conventional 4th Generation products (under the same breakdown voltage and chip size conditions). This improvement contributes to making units smaller while increasing output power in high temperature applications such as traction inverters for xEVs.  ROHM began supporting the bare dies business with 5th Generation SiC MOSFETs in 2025 and completed development in March 2026. Furthermore, starting from July 2026, ROHM will provide samples of discrete devices and modules incorporating 5th Generation SiC MOSFETs.  Going forward, ROHM plans to expand its 5th Generation SiC MOSFET lineup with additional breakdown voltage and package options. ROHM will also continue to enhance its design tools and strengthen application support. By further promoting the implementation of SiC technology – now entering the mainstream phase – ROHM contributes to more efficient power utilization across a wide variety of high-power applications.  Application ExamplesAutomotive Systems: xEV traction inverters, onboard chargers (OBCs), DC-DC converters, electric compressors  Industrial Equipment: Power supplies for AI servers and data centers, PV inverters, ESS (Energy Storage Systems), UPS (Uninterruptible Power Supplies), eVTOL, AC servos  EcoSiC™ BrandEcoSiC™ is a brand of devices that utilize silicon carbide, which is attracting attention in the power device field for performance that surpasses silicon. ROHM independently develops the core technologies needed to advance SiC devices completely in-house, from wafer fabrication and process development to packaging and quality control. At the same time, we have established a fully integrated production system that spans the entire manufacturing flow, solidifying our position as a leading SiC supplier.
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Release time:2026-04-24 10:34 reading:491 Continue reading>>
ROHM has added New Lineup of 17 High-Performance Op Amps Enhancing Design Flexibility
  ROHM has added the new CMOS Operational Amplifier (op amp) series “TLRx728” and “BD728x” to its lineup. These are suitable for a wide range of applications including automotive, industrial, and consumer systems. A broad lineup also makes product selection easier.  In recent years, demand for high-accuracy op amps has been rapidly increasing as automotive and industrial systems become more sophisticated, demanding faster speed, better precision, and higher efficiency. In applications requiring amplification of sensor outputs, minimizing signal error and delay is essential. To meet these requirements, a well-balanced set of key characteristics is needed, including Input Offset Voltage, Noise, and Slew Rate.  These new products are high-performance op amps that offer a low input offset voltage, low noise, and high slew rate. TLRx728 features an input offset voltage of 150 μV (typ.), while the BD728x offers 1.6 mV (typ.). Both series have a noise voltage density of 12 nV/√Hz at 1kHz and a slew rate of 10 V/μs. They are therefore suitable for a wide range of precision applications, including sensor signal processing, current detection circuits, motor driver control, and power supply monitoring systems. Both series are designed to balance versatility and high performance rather than being limited to specific applications.  Rail-to-Rail input/output capability allows maximum utilization of the power supply voltage range, ensuring a wide dynamic range.  Furthermore, in addition to 1 channel, 2 channels, and 4 channels configurations, a diverse range of packages is available, enabling optimal product selection based on application and board size.  The new products are being released simultaneously except for certain part numbers (Sample Price: 1-channel: $2.0, 2-channels: $2.8, 4-channels: $4.0 per unit, excluding tax).  Application Examples  Automotive equipment, industrial equipment, and consumer electronics.  Example use case: Sensor signal processing, current detection circuits, motor driver control, power supply monitoring systems.  Terminology  Input Offset Voltage  The voltage that must be applied between the op amp’s two input terminals to force the output to zero volts.  Slew Rate  A performance metric indicating how rapidly an op amp's output voltage can change while operating in linear region.  Noise Voltage Density  Also called noise spectral density. This is noise power per square root of bandwidth of 1 Hz. The total noise power within a bandwidth of B Hz is Noise Voltage Density x √B.
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Release time:2026-04-03 10:56 reading:640 Continue reading>>

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