SK Chair Sees Memory Shortage Through 2030, Eyes Capacity Doubling and Stronger TSMC, Taiwan Ties

Release time:2026-06-03
author:AMEYA360
source:TrendForce
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SK Chair Sees Memory Shortage Through 2030, Eyes Capacity Doubling and Stronger TSMC, Taiwan Ties

  As next-gen HBM solutions has become a key focus at COMPUTEX amid surging AI demand, SK Group Chairman Chey Tae-won made a brief visit to the SK hynix booth on June 2 and spoke with the media. According to TechNews, Chey expects supply-demand tightness in the memory market to persist through 2030.

  Notably, he also said SK will make full efforts to expand production under tight supply conditions, targeting a doubling of total wafer capacity over the next five years, the report adds.

  Marking his first appearance at COMPUTEX, Chey noted that Taiwan has a highly complete AI supply chain and a strong partner ecosystem. As SK Group continues to expand its AI business, he stressed the need to deepen collaboration with more Taiwanese companies. Beyond TSMC, he said meetings with firms such as Foxconn and Asus are also part of this visit to better understand ongoing cooperation and explore ways to further strengthen partnerships, according to the report.

  SK hynix and TSMC have a long-standing partnership, particularly in logic die integration as custom HBM solutions become an emerging industry trend. As previously reported by The Chosun Daily, SK hynix is expected to adopt a 10nm-class 6th-generation (1c) DRAM process for the core die in its HBM4E, paired with a logic die built on TSMC’s 3nm node. For HBM4 supplied to NVIDIA this year, the company is said to be using a 10nm-class 5th-generation (1b) DRAM core die alongside a logic die based on TSMC’s 12nm process.

  Jensen Huang’s SK hynix Booth Visit Marks Another COMPUTEX Highlight

  It is also wort noting that NVIDIA CEO Jensen Huang also visited the SK hynix booth at COMPUTEX 2026 on June 2, meeting SK Group Chairman Chey Tae-won for the second consecutive day, following a dinner meeting the previous evening. According to Chosun Biz, after his keynote the day before—where he directly identified SK hynix as a supplier of next-generation HBM4—Huang toured the exhibition floor and reviewed the company’s latest memory products.

  During the visit, Huang joined Chey at the SK hynix booth to examine the showcased portfolio, including HBM4E wafers and chipset samples, which entered sampling at the end of last month, the report says. It also marked the first public unveiling of an HBM4E physical mock-up, according to Chosun Biz.


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SK hynix Introduces iHBM Solution, Targets HBM5 Adoption with 30% Thermal Resistance Reduction
  As thermal management emerges as a key challenge for HBM, SK hynix has unveiled its iHBM solution, which integrates cooling elements (ICEs) directly into the HBM package. The company plans to adopt the technology in next-generation products, including HBM5, according to its press release.  According to SK hynix, unlike conventional HBM designs that dissipate heat through the core die, iHBM integrates cooling elements (ICEs), made of thermally conductive, electrically non-conductive silicon-based materials, directly into the D2D PHY between HBM and GPUs, where heat is most concentrated. The company said the technology reduces thermal resistance by 30% and improves operating stability.  As highlighted by SK hynix, the iHBM solution adopts a structural approach to thermal management by creating an additional heat dissipation path within the package. It also leverages the company’s wafer-level packaging (WLP) process and proven MR-MUF technology to enable stable high-volume manufacturing.  In addition, its compatibility with existing System-in-Package (SiP) architectures allows customers to adopt the thermal solution with minimal design modifications, SK hynix adds.  In terms of future roadmap, SK hynix plans to incorporate the iHBM solution into next-generation HBM products, including HBM5, with the goal of improving the stability and efficiency of HPC systems and AI data centers.  Another Key Technology beyond Hybrid Bonding  Alongside SK hynix’s latest iHBM solution, hybrid bonding is widely seen as a key approach to addressing heat dissipation challenges in 20-stack HBM, which, as previously reported by The Elec, are expected to become increasingly difficult.  As explained in the report, hybrid bonding differs from conventional thermo-compression (TC) bonding, which connects chips through soldered micro-bumps. Instead, it bonds dielectric materials such as silicon dioxide (SiO₂) and copper through an annealing process at temperatures of roughly 200°C to 400°C.  By heating and gradually cooling copper sealed within dielectric layers, thermal expansion and vertical pressure enable direct copper-to-copper diffusion bonding without reaching copper’s melting point, the report notes, adding this approach helps reduce thermal damage to semiconductor circuits while delivering improved thermal and electrical performance.
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SKJ:at are Crystals for
  Chips are the brain of digital circuits, and the main function of crystal oscillators is to provide precise and stable clock signals for chips, which is extremely important for control circuits, especially for chips. Clock signals can enable various circuits to complete their functions, as well as synchronize electronic devices with peripheral controller devices.  The position of crystal oscillators in digital circuits is indispensable, so if crystal oscillators are improperly selected or applied in circuits, the problems can be countless. Perhaps because of this, once the device malfunctions, the crystal oscillator is often the first suspect. But is this the only answer?  If the chip cannot capture the frequency signal output by the crystal oscillator, there are many possibilities, such as problems with the chip itself (selection issues, quality issues, welding issues, etc.), incorrect crystal oscillator selection (referring to the mismatch between the crystal oscillator and the chip, such as frequency accuracy, working temperature range, load capacitance selection) The crystal oscillator itself is poor (quality is unqualified, the crystal oscillator is damaged in Ultrasonic welding, the crystal oscillator is broken, and its air tightness is damaged), and the crystal oscillator is improperly used in circuit applications (including faulty soldering, too long wiring, wrong pin identification, short circuit, open circuit, wrong selection of load capacitance, improper matching of external capacitance, excessive stray capacitance interference, motor interference, power interference, etc.).  The most frequently asked question recently is: Just touch the crystal oscillator with your hand, what's going on in a while? Is the crystal oscillator broken?  Based on experience, this situation is generally caused by improper application of crystal oscillators in circuits. It is recommended to check whether the accuracy of the actual output frequency of the crystal oscillator meets the chip requirements after power on. If there is a serious deviation in the crystal oscillator frequency, we generally recommend adjusting the size of the external capacitor to improve it. If the problem persists, please consult Jingkexin's official website customer service to further understand some special cases.
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