Gridspertise and STMicroelectronics Expand Collaboration
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Gridspertise and STMicroelectronics Expand Collaboration

　　Gridspertise and STMicroelectronics (ST) have entered a new phase of their long-term collaboration on smart-meter technologies. The announcement was made at DistribuTECH 2023.　　The two companies’ collaboration started in the early 2000’s with one of Gridspertise’s shareholders Enel; today more than 65 million Gridspertise smart meters deployed in Spain, Eastern Europe, and Latin America leverage the power-line communication (PLC) technologies provided by ST. Moreover, ST’s latest PLC system-on-chip has been integrated in Gridspertise smart meters for Italy to enable a near real-time cyber-secure communication channel for in-home devices; the so-called Chain 2 technology. Now, Gridspertise and ST are working together to extend Chain 2 to new metering solutions in the Gridspertise portfolio, making it suitable for the U.S. and other geographies.　　For end customers, Chain 2 technology improves awareness of the energy consumed and self-produced. It enables a multitude of new enhanced services that simplify their energy usage through home automation. Chain 2 technology encourages a more active role for all the players in the energy market, as well as the penetration of distributed renewable sources. For example, the technology allows to recommend to the end customer tailor-made behaviors based on real-time data production from its own generation system, like photovoltaic panels.  It also enables the smart meter to collect real-time data on home appliances’ consumption, that can be used, for example, to modulate the charging power of an EV charger according to the available capacity and other demands for power in the house.　　Furthermore, Gridspertise and ST are collaborating in multiple other areas, too. Beyond working on ANSI C communication standard for the U.S. market, the Companies are cooperating for the adoption of the latest DLMS1-certified standards into Gridspertise smart meters, to further enhance interoperability and interchangeability between devices and systems.　　“Working together with other key industry leaders is fundamental to accelerating grid digitalization and to promoting an active role for end users in the energy transition,” said Gianni Ceneri, Chief Technology Officer, Gridspertise. “We are pleased to strengthen our strategic collaboration with STMicroelectronics leveraging shared best practices for the development of innovative solutions to serve an ever-increasing number of markets and bring benefits to new customers, starting from the U.S. where Gridspertise is enhancing its activities through its North American platform to better support power grid operators and utilities in the region.”　　“As Gridspertise accelerates the growth of its business, ST continues to develop and contribute our unique system know-how, dedicated support, and ready-to-use solutions based on our advanced semiconductor integration capabilities,” added Domenico Arrigo, General Manager of STMicroelectronics’s Industrial and Power Conversion Division in the Analog, MEMS & Sensors Group. “We are maintaining and enhancing our connection as a key technology provider for Gridspertise solutions and services, and with them delivering smart and sustainable grids that are robust, secure, resilient, and reliable.”　　This latest step in the collaboration between Gridspertise and ST perfectly suits Gridspertise’s mission to deliver a new era of sustainable and reliable smart grids, which is extremely timely in the current U.S. context, where new federal policies have unleashed a wave of investment in the energy transition and grid modernization. Together, ST and Gridspertise are unlocking the penetration of new flexible and distributed sustainable energy sources and the active participation of end customers through increasingly digitalized grids.　　Both Companies have branches in the U.S. to directly engage with tech companies, power grid operators, policy makers, and regulators, accelerating the region’s electric future.
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Release time：2023-02-24 15:21 reading：1931 Continue reading>>
Cadence unveils Tensilica Vision Q6 <span style='color:red'>DSP</span> IP
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Cadence unveils Tensilica Vision Q6 DSP IP

　　Cadence Design Systems has unveiled the Cadence Tensilica Vision Q6 DSP, its latest DSP for embedded vision and AI that has been built on a new, faster processor architecture.　　The fifth-generation Vision Q6 DSP offers 1.5X greater vision and AI performance than its predecessor, the Vision P6 DSP, and 1.25X better power efficiency at the Vision P6 DSP’s peak performance and is being targeted at embedded vision and on-device AI applications in the smartphone, surveillance camera, automotive, augmented reality (AR)/virtual reality (VR), drone and robotics markets.　　With a deeper, 13-stage processor pipeline and system architecture designed for use with large local memories the Vision Q6 DSP is able to achieve 1.5GHz peak frequency and 1GHz typical frequency at 16nm, in the same floorplan area as the Vision P6 DSP. As a result, designers will be able by using the Vision Q6 DSP to develop high-performance products that meet both vision and AI demands as well as power-efficiency needs.　　Among additional features and capabilities an enhanced DSP instruction set provides up to 20 percent fewer cycles than the Vision P6 DSP for embedded vision applications/kernels such as Optical Flow, Transpose and warpAffine, and commonly used filters such as Median and Sobel, while 2X system data bandwidth with separate master/slave AXI interfaces for data/instructions and multi-channel DMA addresses memory bandwidth challenges in vision and AI applications. It also reduces latency and overhead associated with task switching and DMA setup.　　Crucially the Q6 DSP provides backwards compatibility with the Vision P6 DSP, meaning that customers will be able to preserve their software investment for an easy migration.　　The Vision Q6 DSP supports AI applications developed in the Caffe, TensorFlow and TensorFlowLite frameworks through the Tensilica Xtensa Neural Network Compiler (XNNC). The XNNC maps neural networks into executable and highly optimised high-performance code for the Vision Q6 DSP, leveraging a comprehensive set of optimised neural network library functions.　　The Vision Q6 DSP also supports the Android Neural Network (ANN) API for on-device AI acceleration in Android-powered devices. The software environment also features complete and optimised support for more than 1,500 OpenCV-based vision and OpenVX library functions, enabling fast, high-level migration of existing vision applications.　　The Vision P6 DSP and the Vision Q6 DSP are designed for general-purpose embedded vision and on-device AI applications requiring performance ranging from 200 to 400 GMAC/sec. With its 384 GMAC/sec peak performance, the Vision Q6 DSP is well suited for high-performance systems and applications. The Vision Q6 DSP can be paired with the Vision C5 DSP for applications requiring greater than 384 GMAC/sec AI performance.　　Select customers are integrating the Vision Q6 DSP in their products, and it is now available to all customers.
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Release time：2018-04-13 00:00 reading：1201 Continue reading>>
<span style='color:red'>DSP</span> Start-up Snags Funding, Targets 5G
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DSP Start-up Snags Funding, Targets 5G

　　Paris-based digital signal processing IP fabless start-up VSORA this week announced it raised$1.7 million in series A funding for what it says is a new approach to DSP needed to address the performance and complexity requirements of 5G and other applications.　　VSORA was founded in 2015 by DSP engineers from the former mobile TV chip developer DiBcom,now part of Parrot.It says its DSP architecture and development platform target wireless mobile applications and boost computing power,optimize power consumption and system performance,and reduce silicon footprint.　　"With the coming 5G mobile standard,traditional DSP technology will run out of steam on multiple levels.Our aim is to become the reference point for state-of-the-art DSP applications,"said Khaled Maalej,VSORA’s CEO.　　Maalej said the company enables the same piece of code to combine the embedded software and the digital signal processing elements of the system.He said this addresses an issue that has faced the industry for years:How can you make the embedded software engineers communicate with the DSP engineers more easily and share the same code?　　“Typically,engineers would have to write the algorithms at MATLAB level and then that code would have to be combined with the embedded software,"Maalej said."But as the complexity of the baseband increases,and bit rate increases significantly—especially with the opening up of the millimetre wave band for 5G for example—then you need a different approach and higher performance DSP.”　　Maalej said VSORA's goal“was always to create a new architecture that provides a common platform for the DSP and the embedded software,and brings programmability and flexibility.”　　The DSP IP from VSORA includes its MPU-801 single core processor as well as a higher performance version,the MPU-3201,both of which can be used as part of multi-core processor configurations.The company says the processing power available eliminates the need for specific co-processors,with customizable floating point ALUs.It allows the mixing of signal processing with embedded software code,with one code for the data-link layer and physical layer,and codes automatically separated for the DSP and the CPU.The platform enables mapping of the algorithms to individual cores,and the interconnect between the cores is automatically handled.　　The company was incorporated by Maalej and three other former Dibcom engineers in September 2015.VSORA’s product development was self-funded together with loan support from bpifrance,the French public sector financing agency for innovation.　　"Without the bpifrance loan,it would have been harder to complete the first phase of R&D and make our first release of the product in Q4 2017,"Maalej said.　　The$1.7 million investment was provided by Omnes Capital,Partech Ventures and angel investors.It will be used to expand VSORA’s R&D and build sales channels in the United States and Asia.　　"VSORA’s solution will have a transformative impact on the performance of DSP chips,"said Boris Golden,principal at investor Partech Ventures,in a press statement.“We believe that VSORA will become a strategic enabler of all 5G communications in the near future."
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Release time：2018-01-22 00:00 reading：1157 Continue reading>>

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